1. Field of the Invention
The present invention relates to a communication circuit of a serial peripheral interface (SPI) device.
2. Description of Related Art
In computer technology, an SPI is a communication interface for data communications between a master device such as a central processing unit (CPU) of a computer and slave devices such as peripheral chips of the computer. An SPI bus includes a chip select (CS) terminal. When the chip select terminal receives a signal, the SPI bus can receive data and send data.
Referring to FIG. 2, a conventional communication circuit of SPI devices includes a CPU 100, a peripheral interface controller (PIC) 200, and an SPI bus 300. The CPU 100 includes an SPI bus control unit. The SPI bus control unit includes a chip select terminal CS, a serial data output terminal SDO, a serial data input terminal SDI, and a serial clock terminal SCLK. The PIC 200 includes an SPI bus control unit. The SPI bus control unit includes a control terminal P is connected to the chip select terminal CS, a data input terminal DIN is connected to the serial data output terminal SDO, a data output terminal DOUT is connected to the serial data input terminal SDI, and a clock terminal S is connected to the serial clock terminal SCLK. The PIC 200 is connected to an apparatus 400, such as a memory. The PIC 200 receives information from the apparatus 400 and sends the information to the CPU 100. At the same time, the PIC 200 receives instructions from the CPU 100 and transforms the instructions to control signals to control operations of the apparatus 400. However, if more than one PIC 200 is connected to the CPU 100, the CPU 100 cannot distinguish them.
What is needed, therefore, is a communication circuit for SPI devices which can solve the above problem.